Formal Methods in Computer-Aided Design: 5th International Conference, FMCAD 2004, Austin, Texas, USA, November 15-17, 2004, Proceedings, Volume 5
These are the proceedings of the ?fth international conference, Formal Methods in Computer-Aided Design (FMCAD), held 15–17 November 2004 in Austin, Texas, USA. The conference provides a forum for presenting state-of-the-art tools, methods, algorithms, and theory for the application of formalized r- soning to all aspects of computer-aided system design, including speci?cation, veri?cation, synthesis, and testing. FMCAD's heritagedates back20 yearsto someof the earliestconferenceson the subjectofformalreasoningandcomputer-aideddesign.Since 1996,FMCAD has assumedits presentform,heldbiennially inNorthAmerica,alternatingwith its sister conference CHARME in Europe. We are delighted to report that our researchcommunitycontinuesto?ourish:wereceived69papersubmissions,with many more high-quality papers than we had room to accept. After a rigorous review process, in which each paper received at least three, and typically four or more, independent reviews, we accepted 29 papers for the conference and inclusion in this volume. The conference also included invited talks from Greg Spirakis of Intel Corporation and Wayne Wolf of Princeton University. A conference of this size requires the contributions of numerous people. On the technical side, we are grateful to the program committee and the additional reviewers for their countless hours reviewing submissions and ensuring the int- lectual quality of the conference. We would also like to thank the steering c- mittee for their wisdom and guidance. On the logistical side, we thank Christa Mace for designing our website and attending to countless organizational tasks. And we thank our corporate sponsors – AMD, IBM, Intel, and Synopsys – for ?nancial support that helped make this conference possible.
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Formal Methods in Computer-Aided Design: 5th International ..., Volume 5
Alan J. Hu,Andrew K. Martin
No preview available - 2004
3-valued abstraction accepting cycle ACL2 algorithm approach array backtracking BDD-based benchmark Black Box Bloom filter Boolean bounded model checking BPCTL cache checker circuit clauses completion functions Computer-Aided Design constraints counterexample defined definition denotational semantics denote double hashing efficient encoding engine equivalence Esterel finite fixed-point FMCAD formal verification graph hash heuristic hybrid IEEE image computation implementation implication graph implies initial input iterations Kripke structure Lemma LNCS memory method model checking netlist node NuSMV OBDDs OpenRISC operational semantics optimization ordinal ordinal arithmetic output partition path performed pipeline problem proof proof-based propositional formula protocol prove QUBE++ query reachability analysis recursive reduced SAT solver satisfied Section sequential simulation solutions specification Springer-Verlag step subformula symbolic model checking sync-at-fetch sync-at-retire techniques temporal logic Theorem tion transformation transition relation vacuity detection variable orders