Hardware/Software Co-Design: Principles and Practice

Front Cover
Springer Science & Business Media, Oct 31, 1997 - Technology & Engineering - 396 pages
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Introduction to Hardware-Software Co-Design presents a number of issues of fundamental importance for the design of integrated hardware software products such as embedded, communication, and multimedia systems. This book is a comprehensive introduction to the fundamentals of hardware/software co-design. Co-design is still a new field but one which has substantially matured over the past few years. This book, written by leading international experts, covers all the major topics including:
  • fundamental issues in co-design;
  • hardware/software co-synthesis algorithms;
  • prototyping and emulation;
  • target architectures;
  • compiler techniques;
  • specification and verification;
  • system-level specification.

Special chapters describe in detail several leading-edge co-design systems including Cosyma, LYCOS, and Cosmos.
Introduction to Hardware-Software Co-Design contains sufficient material for use by teachers and students in an advanced course of hardware/software co-design. It also contains extensive explanation of the fundamental concepts of the subject and the necessary background to bring practitioners up-to-date on this increasingly important topic.
 

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Contents

Essential Issues in Codesign
1
111 Models and Architectures
2
112 FiniteState Machines
3
113 Dataflow Graph
5
114 FiniteState Machine with Datapath
6
115 Hierarchical Concurrent FiniteState Machines
8
116 Programming Languages
10
117 ProgramState Machines
11
57 Conclusions
191
Design Specification and Verification
193
611 Design
194
612 Codesign
195
613 The Codesign Computational Model
196
62 Concurrency
198
621 Components
199
622 Nondeterminism
200

12 Architectures
13
123 FSMD Architecture
17
124 CISC Architecture
18
125 RISC Architecture
20
126 VLIW Architecture
21
127 Parallel Architecture
22
13 Languages
24
132 State Transitions
26
133 Hierarchy
27
134 Programming Constructs
29
135 Behavioral Completion
30
137 Timing
31
138 Communication
32
139 Process Synchronization
34
14 A Generic CoDesign Methodology
36
142 Allocation and Partitioning
38
143 Scheduling
40
144 Communication Synthesis
41
145 Analysis and Validation Flow
43
146 Backend
44
HardwareSoftware CoSynthesis Algorithms
47
22 Preliminaries
51
23 Architectural Models
53
24 HardwareSoftware Partitioning
56
241 Architectural Models
57
243 Vulcan
58
244 Cosyma
61
245 Other Partitioning Systems
62
251 An Integer Linear Programming Model
63
252 Performance Analysis
65
253 Heuristic Algorithms
66
254 System Partitioning
70
255 Reactive System CoSynthesis
71
256 Communication Modeling and CoSynthesis
72
26 Conclusions
73
Prototyping and Emulation
75
32 Prototyping and Emulation Techniques
78
33 Prototyping and Emulation Environments
83
331 The Weaver Prototyping Environment
85
332 Quickturn Emulation Systems
90
333 Mentor SimExpress Emulation System
93
334 Zycad Paradigm RP and XP
94
335 Aptix Prototyping System
97
336 Arkos Synopsys and CoBalt Quickturn Emulation Systems
100
34 Future Developments in Emulation and Prototyping
101
341 Target Architecture
103
35 Example
106
36 Results
109
37 Conclusions
111
Target Architectures
113
42 Architecture Specialization Techniques
116
422 System Specialization
117
423 System Specialization Techniques
118
424 Memory Architectures
120
43 System Communication Infrastructure
122
44 Target Architectures and Application System Classes
125
45 Architectures for ControlDominated Systems
126
451 8051 An 8bit Microcontroller Architecture
127
452 Architectures for HighPerformance Control
131
46 Architectures for DataDominated Systems
135
461 ADSP21060 SHARC
136
462 TMS320C80 MVP
141
47 Mixed Systems and Less Specialized Systems
145
48 Selected CoDesign Problems
147
Compilation Techniques and Tools for Embedded Processeor Architectures
149
52 Continued Integration Leads to Embedded Processors
150
53 Modern Embedded Architectures
151
532 Examples of Emerging Architectures
153
54 Embedded Software Development Needs
160
542 Design Tool Requirements
161
55 Compilation Technologies
162
551 Are Traditional Compilation Techniques Enough?
163
552 Retargetability Specification Languages and Models
166
553 Compiler Techniques for Specialized Architectures
170
554 Optimizations for embedded processors
176
56 Practical Considerations in a Compiler Development Environment
179
561 Compiler Validation
184
562 SourceLevel Debugging
187
563 Architecture and Algorithm Exploration
189
623 Concurrency in Standard Languages
203
624 Synchronous and Asynchronous Computations
205
625 Classification of HighLevel Languages
207
63 Coordinating Concurrent Computations
208
631 Classification
210
633 Open Versus Closed Operations
213
634 Blocking Versus Nonblocking Operations
214
635 Remote Procedure Calls
216
636 Classification of Coordination Paradigms
217
641 Physical Realization of State Variables
220
65 Verification
222
651 Design Verification
225
653 Verification Tools
228
654 Interface Verification
229
66 Conclusions
232
Languages for SystemLevel Specification and Design
235
72 SystemLevel Specification
236
722 Heterogeneous Specification
237
73 Design Representation for System Level Synthesis
238
732 Basic Concepts and Computational Models
240
733 Language Oriented Intermediate Forms
241
734 Architecture Oriented Intermediate Forms
242
735 Distributed Intermediate Forms
244
74 System Level Specification Languages
245
742 Comparing Specification Languages
248
75 Heterogeneous Specifications and MultiLanguage CoSimulation
251
752 Cosimulation Models
253
753 Automatic Generation of CoSimulation Interfaces
255
CVHDL Specification and CoSimulation
257
755 Towards System Level Multilanguage Specification and CoSimulation
260
76 Conclusions
261
The Cosyma System
263
82 Cosyma Architecture and Input Languages
264
821 Cosyma design flow and user interaction
265
83 HardwareSoftware Partitioning
267
84 Hardware and Software Synthesis
268
85 Communication Estimation and Code Optimization
269
86 The ScalablePerformance Scheduler
271
861 An Example
272
87 System Optimization Example
273
873 Real World Example
277
88 New Approaches in Cosyma
278
882 SYMTA Symbolic Timing Analysis
281
HardwareSoftware Partitioning Using the LYCOS System
283
92 Partitioning and Design Space Exploration
284
93 Overview of the LYCOS System
285
94 A Partitioning Session in LYCOS
288
95 Design Space Exploration with LYCOS
302
96 Summary
305
Cosmos A Transformational CoDesign Tool for Multiprocessor Architectures
307
1011 Requirements for CoDesign of Multiprocessor Systems
308
1012 Previous Work
309
1013 Contributions
310
A Global View
311
103 Design Models Used By Cosmos
314
1032 System Specification With SDL
315
A SystemLevel Model for CoDesign
317
1034 Communication Modeling and Refinement Concepts
321
1035 Communication Refinement
322
1036 Virtual Prototyping Using CVHDL Models
325
104 Design Steps
327
1041 SDL Compilation
328
1043 HardwareSoftware Partitioning And Communication Refinement
330
1044 Architecture Generation
336
1045 VHDLC Cosimulation Interface
337
1046 CVHDL Model Generation
338
1047 Prototyping
340
1048 Hardware Design
341
1049 Software Design
343
105 Application
344
1052 CVHDL CoSimulation
348
1053 Architecture Generation
352
106 Evaluation
354
107 Conclusions
356
108 Acknowledgements
357
References
359
Index
387
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