High Performance Computing - HiPC'99: 6th International Conference, Calcutta, India, December 17-20, 1999 Proceedings
International Conference on High Performance Computing 1999 Calcutta, Prith Banerjee, V. K. Prasanna Kumar
Springer Science & Business Media, 1999 - Computers - 412 pages
These are the proceedings of the Sixth International Conference on High Performance Computing (HiPC’99) held December 17-20 in Calcutta, India. The meeting serves as a forum for presenting current work by researchers from around the world as well as highlighting activities in Asia in the high performance computing area. The meeting emphasizes both the design and the analysis of high performance computing systems and their scientific, engineering, and commercial applications. Topics covered in the meeting series include: Parallel Algorithms Scientific Computation Parallel Architectures Visualization Parallel Languages & Compilers Network and Cluster Based Computing Distributed Systems Signal & Image Processing Systems Programming Environments Supercomputing Applications Memory Systems Internet and WWW-based Computing Multimedia and High Speed Networks Scalable Servers We would like to thank Alfred Hofmann and Ruth Abraham of Springer-Verlag for their excellent support in bringing out the proceedings. The detailed messages from the steering committee chair, general co-chair and program chair pay tribute to numerous volunteers who helped us in organizing the meeting. October 1999 Viktor K. Prasanna Bhabani Sinha Prithviraj Banerjee Message from the Steering Chair It is my pleasure to welcome you to the Sixth International Conference on High Performance Computing. I hope you enjoy the meeting, the rich cultural heritage of Calcutta, as well as the mother Ganges, “the river of life”.
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accessible surface area alias analysis allocation analysis AODV applications architecture B.P. Sinha Eds bandwidth Banerjee Berlin Heidelberg 1999 bytes cache cells channel cluster communication constant propagation delay denote dependence disk DSDV dynamic evaluation execution expression tree ﬁle function graph hash table hypercube IEEE implementation Intel Paragon iteration k-ary latency lightpath LNCS load balancing loop macrocell mapping memory meshes method mobile multicast multiprocessor node number of processors offset sets optimal overhead PACE+ packet paging paper parallel algorithm Parallel and Distributed parallel computer Parallel Processing parameters partitioning path pipelining prediction problem Proc proposed protocol PSIP queue RAID1 RAID5 random requests routing policy scheduling algorithms scheme sequential server simulation slot software pipelining space speedup sphere Springer-Verlag Berlin Heidelberg subtasks Table technique throughput traffic transactions update V.K. Prasanna vector wavelength wireless