## High-speed Digital System DesignHigh-Speed Digital System Design bridges the gap from theory to implementation in the real world. Systems with clock speeds in low megahertz range qualify for high-speed. Proper design results in quality digital transmissions and lowers the chance for errors. This book is for computer and electrical engineers who may or may not have learned electromagnetic theory. The presentation style allows readers to quickly begin designing their own high-speed systems and diagnosing existing designs for errors. After studying this book, readers will be able to: Design the power distribution system for a printed circuit board to minimize noise; plan the layers of a PCB for signals, power, and ground to maximize signal quality and minimize noise; include test structures in the printed circuit board to easily diagnose manufacturing mistakes; choose the best PCB design parameters such a trace width, height, and routed path to ensure the most stable characteristic impedance; determine the correct termination to minimize reflections; predict the delay caused by a given PCB trace; minimize driver power consumption using AC terminations; compensate for discontinuities along a PCB trace; use pre-emphasis and equalization techniques to counteract lossy transmission lines; determine the amount of crosstalk between two traces; and diagnose existing PCBs to determine the sources of errors. |

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### Contents

1 | |

3 | |

Layout Considerations for Bypass Capacitors | 9 |

13 LAYER STACKING | 11 |

Embedded PCB Capacitance | 12 |

Layer Order | 13 |

Stacking Stripes | 16 |

14 VIAS | 17 |

Realistic Transmission Lines | 53 |

33 RC AND LC REGIONS | 56 |

LumpedElement Region | 57 |

RC Region | 59 |

LC Region | 60 |

34 SKIN EFFECT | 61 |

Surface Roughness | 66 |

Proximity Effect | 67 |

Via Models | 20 |

Ideal Transmission Lines | 23 |

Measuring Characteristic Impedance | 27 |

23 PROPAGATION VELOCITY | 30 |

24 REFLECTIONS | 33 |

Bounce Diagrams | 36 |

25 IMPEDANCE COMPENSATION | 43 |

Load Termination | 44 |

Power Consumption | 45 |

Capacitive Termination | 48 |

Capacitive and Inductive compensation | 50 |

35 DIELECTRIC LOSSES | 69 |

36 COMPENSATING TECHNIQUES | 72 |

Transmitter Preemphasis | 73 |

Receiver Equalization | 75 |

37 ROUTING SIGNALS THROUGH VIAS | 76 |

Signal Quality Degradation | 79 |

43 NEAREND AND FAREND CROSSTALK | 82 |

44 CROSSTALK IN VIAS | 85 |

45 CROSSTALK IN DIFFERENTIAL SIGNALS | 86 |

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attenuation blip bounce diagram bypass capacitor capacitance characteristic impedance current ﬂowing dc resistance decreases deﬁned delay dielectric constant difﬁcult digital circuits digital signals drilled equation far-end crosstalk FIGURE ﬁnal ﬁnd ﬁrst ground plane ground vias high frequencies high-frequency high-speed signals hole inches increases inductance and capacitance inductor inﬁnite LC region load impedance logic devices loss tangent magnetic ﬁeld maximum measured meters minimize mutual inductance near-end noise onset frequency package parasitic inductance PCB design PCB trace power and ground power distribution system power plane power supply power/ground pre-emphasis printed circuit board propagation coefﬁcient proximity effect pulse reduce reﬂect back reﬂection coefﬁcient return current root of frequency routed shown in Fig signal layers signal quality signal trace signiﬁcant signiﬁcantly simulation skin depth skin effect region solder speciﬁc stacking stripes stripline terminating resistor trace length trace width transmission line transmitted voltage wave wire zero

### Popular passages

Page iv - I would like to dedicate this book: To my parents for your lifelong dedication to me.