Incorporating guarded execution into existing instruction sets
Abstract: "Guarded execution, or simply guarding, is a powerful and promising concept, with the potential to reduce the unpredictability of the control flow caused by branches, and smoothen the flow of instructions in processor pipeline(s). Guarding also boosts the compiler's ability to expose instruction level parallelism to the processor, while requiring a modest amount of hardware support. These features make guarding attractive for inclusion in an architecture. However, the integration of guarding in an instruction set is not easy, especially when the designer needs to extend an existing instruction set. This thesis address [sic] two issues that are critical to the widespread acceptance for guarding: (i) the required instruction set support for guarded instructions, and (ii) the performance on aggressive processor configurations. This thesis proposes GUARD instructions, a new class of instructions that offer an easy and powerful way to accommodate guarded execution in an instruction set. With the modest requirement of just a few opcodes, GUARD instructions are sufficient to provide efficient support for full guarding. This thesis evaluates and compares the performance of three ways of supporting guarding: (i) using explicit guard operand fields in each instruction, (ii) using conditional move instructions, and (iii) the newly proposed GUARD instructions. The results of this evaluation show that for all configurations, GUARD instructions perform better than ordinary guarding. They also show that conditional moves can exploit a large fraction of the potential of full guarding, and that hardware mechanisms such as 2-level adaptive branch prediction and out-of-order execution diminish the performance potential of guarded execution."
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Compiling for guarded execution
Effects of guarding on the dynamic program characteristics
3 other sections not shown
4-issue processor 8-issue architecture basic block benchmark programs branch prediction compiler Compress cond condition evaluation conditional branch conditional move instructions control dependences control flow graph correlation-based predictor corresponding counter-based predictor cycle decode destination register dynamic branch predictor effects of guarding eliminate Elvis Espresso existing instruction set exit Figure full guarding guard condition Guard instructions Guard Mask Buffer guard register GuardBoth instruction guarded computation guarded execution guarded programs guarded version guarding overhead hyperblock if-conversion in-order processor instruction count instruction set support instructions guarded issue misprediction penalty node number of Guard number of instructions number of mispredictions opcode optimizations original and guarded out-of-order execution performance of Guard pipeline prediction accuracy profiling information reduce the number reference count register file Renamed Scalar Mask RK algorithm Run-Length scalar mask bit scalar mask register scheduling set instructions squashed squashed computation support for guarding support guarded Table taken branch tion Total/Average Xlisp