Low Voltage, Low Power VLSI Subsystems

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McGraw-Hill, 2005 - Technology & Engineering - 293 pages
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This monograph details cutting-edge design techniques for the low power circuitry required by the many new miniaturized business and consumer products driving the electronics market

This book teaches cutting edge techniques in low power CMOS/BICMOS VLSI subsystems design, covering in depth the challenges facing integrated circuit and system designers in creating low-power VLSI subsystems.

Leakage currents and noise coupling in high-speed dynamic circuits and systems will be discussed, along with new circuit techniques to overcome basic design obstacles.

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LowPower CMOS VLSI Design
Circuit Techniques for LowPower Design
LowVoltage LowPower Adders

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About the author (2005)

Kiat-Seng Yeo, Ph.D., is a recognized expert in CMOS technology and IC design. Sub-Dean and Associate Professor of Electrical and Electronic Engineering at Nangyang Technological University in Singapore, he has published over 130 papers in his areas of expertise.

Kaushik Roy, Ph.D., is Professor of Electrical Engineering at Purdue University and a widely known authority on circuit design. Author of more than 200 papers in refereed journals and conferences, he serves on the editorial boards of IEEE Design and Test, IEEE Transactions on Circuits and Systems, and IEEE Transactions on VLSI Systems.

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