Multi-layer Channel Routing Complexity and Algorithms
Suitable for senior-level graduate or a postgraduate course in computer science and engineering or electronics and electrical communication engineering students, who have a basic idea of data structures, graph theory and fundamentals of VLSI design, this book deals the subject matter with many supporting examples, diagrams and computed results.
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Resolving Horizontal Constraints in MultiLayer
A General Framework for Track Assignment
Computational Complexity of Area Minimization
An Algorithm for Finding a Lower Bound on
Computational Complexity of Approximate Area
Computational Complexity of Wire Length Mini
Algorithms for Minimizing Wire Length in Multi
Summary Related Fields of Research and Open
A Channel Specifications
B Tables for Reduced Wire Length
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3SAT algorithm MCC1 area minimization area of routing bottom CCH2 channel specification chordal graph comparability graph consider construction cycle-tough density routing solution dmar extreme layer four-layer graph G heuristics HNCG horizontal wire segments HVH routing model HVH routing solution independent set iteration maximal clique maximum independent set minimizing the total minimizing wire length minimum clique cover minimum number MLCR multi-layer channel routing multi-terminal nets no-dogleg routing solution NP-complete NP-hard number of nets number of tracks parametric difference partition polynomial proof of Theorem RDC5 reduced wire length required for routing restricted dogleg routing router routing channels routing solution computed RVCG RVCoca set of nets solution for Ex source vertices subnets terminals three-layer HVH routing TNVH total wire length tracks required two-layer no-dogleg routing two-layer VH routing two-terminal nets vertex vertical constraints vertical layers vertical wire segments VHV routing VHVH VLSI WHPK wire length minimization
Page 376 - BW Kernighan, DG Schweikert, and G. Persky, "An Optimum Channel Routing Algorithm for Polycell Layouts of Integrated Circuits," Design Automation Workshop Proceedings, p.
Page 379 - ... VLSI Design Techniques, vol. 2, GW Zobrist, Ed., Ablex Publishing Corpn., Norwood, New Jersey, pp. 93-121, 1990.  Pal RK, Multi-Layer Channel Routing: Complexity and Algorithms, Narosa Pub. House, New Delhi, 2000. Also published from CRC Press, Boca Raton, USA and Alpha Sc. Int. Ltd., UK, 2000.  Pal RK, AK Datta, SP Pal, MM Das and A. Pal, A General Graph Theoretic Framework for MultiLayer Channel Routing, Proc.