Research on the Multiscalar execution model was introduced in the early 1990's, recognizing the inadequacies of relying entirely on Instruction Level Parallelism (ILP). The goal was to augment the parallelism bridgehead established by ILP with the ground forces of Thread-Level Parallelism (TLP), a coarser form of parallelism. Many studies on parallelism indeed confirm the significant performance potential of executing multiple threads of a program in parallel. The difficulties that have been plaguing the parallelization of ordinary, non-numeric programs for decades have been complex flows of control and ambiguous data dependences through memory. The breakthrough provided by the Multiscalar execution model was the use of speculative threads along with data speculation. Speculative threads allow sequential programs to be parallelized, and data speculation allow threads to be executed in parallel even if they are likely to have data dependences.
Multiscalar Processors presents a comprehensive treatment of the basic principles of Multiscalar execution, and advanced techniques for implementing the Multiscalar concepts. Special emphasis is placed on highlighting the major challenges involved in Multiscalar processing. This book is organized into nine chapters, and provides an excellent synopsis of a large body of research carried out on multiscalar processors in the last decade. It starts with technology trends that provide an impetus to the development of multiscalar processors and shape the development of future processors. The work ends with a review of the recent developments related to multiscalar processors.
Multiscalar Processors is designed to meet the needs of a professional audience composed of designers and programmers of next-generation processors and researchers in computer architecture and engineering. This book is also suitable as a secondary text for graduate level students in computer science and engineering.
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THE MULTISCALAR PARADIGM
MULTISCALAR THREADSSTATIC ASPECTS
MULTISCALAR THREADSDYNAMIC ASPECTS
MULTISCALAR PROCESSORCONTROL FLOW
MULTISCALAR PROCESSORREGISTER DATA FLOW
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active threads architectural register basic block branch prediction busy bits chapter circular queue consumer instruction control flow graph create mask current instance cycle data cache data values decentralized dependence speculation disambiguation duplicate thread dynamic instruction dynamic thread exploit fetched Figure forwarding future cache global heuristics implementation incorrect induction variable instruction cache inter-thread control flow inter-thread data dependences inter-thread memory inter-thread RAS intra-thread scheduling last update loads and stores memory data flow memory dependence memory disambiguation memory locations memory references memory values misspeculations multi-version register file multiple threads multiscalar paradigm multiscalar processor multiscalar threads out-of-order out-of-order execution outcome parallelism path performance predictor processing units program order program partitioning re-execution register data flow register dependences register renaming register values return address return instruction run-time scheme sequencing spawned speculative execution speculative multithreading squashed subroutine subsequent threads successor thread superscalar superthread techniques thread-level thread-level parallelism trace VLIW