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RMC660 System Chassis 213
BLC80P14 Prototyping Package
Memory and Combination Memory and InputOutput
15 other sections not shown
0.1 inch centers 64K bytes analog input Base BASlC Baud Rate bits BLC-604 Card Cage BLC/SBC Board Level Computer breakpoint buffer bus masters bytes of static cables card cage centers Recommended mating character command configuration connector on 0.1 contact double-sided card contact double-sided edge CPU board current loop debugging devices double-sided edge connector emulation EPROM expansion boards external FORTRAN Functional Description Hardware Reference Manual Hexadecimal inch centers Recommended interface interrupt jumper selected Latched lnput lnput/Output lnstruction Load logic lOPB memory addressing memory mapped microcomputer microprocessor mode modules National Semiconductor National's non-condensing Number on-board open collector operation Plug-replacement Power Supply processor Product Overview program counter PROM provides RAM and ROM read only memory Recommended mating connector ROM/PROM sample and hold scan serial communications Series/80 Board signals sockets Specifications STARPLEX STARPLEX system static RAM strobed Synchronous System Bus timer TTL compatible USART voltage