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DESCRIPTIONS OF PERIPHERALS
16bit word two 8bit bytes
5 other sections not shown
A/D converter acter Address Register asserted Baud bit bit bit is set BIT NAME FUNCTION Block Check Character Bus Address bus load bus master cable card reader channel Circuit cleared by INIT Cleared by Unibus clock connector Control and Status Control Register Controller Clear cycle Data Set data transfer DDCMP DECtape DECwriter detected device DIGITAL disk double buffered Drive Clear flag half-duplex hardware indicate input interface Interrupt Enable interrupt request Interrupt vector INTR jumper logic maintenance Master Clear memory microprocessor mode modem module mounted MSYN multiplexer operation option output parity bit parity error PDP-11 program peripheral processor program control protocol read station Ready received character Received Data Reset RxDBUF selected sequence signal silo slots specified speed SSYN Status Register switch Sync character synchronous System Unit tape terminal tion transmission UART UNIBUS Unibus A INIT write zero