Proceedings, the 20th Annual International Symposium on Computer Architecture: May 16-19, 1993, San Diego, California
IEEE Computer Society Press, 1993 - Computers - 361 pages
ISCA ^93, the flagship conference of the computer architecture community, was held in San Diego, Calif., May 1993. This proceedings volume includes sessions covering architectural characteristics of scientific applications, TLBs and memory management, input/output, multiprocessor caches, multithreading support, mechanisms for creating shared memory, cache design, evaluation of machines, processor architecture and implementation, multiprocessor memory systems, and memory systems and interconnection. Two panel sessions address high performance computing from the applications perspective and how to measure success in experimental research. No index. Annotation copyright by Book News, Inc., Portland, OR.
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Working Sets Cache Sizes and Node Granularity Issues for LargeScale Multiprocessors
TLBs and Memory Management
Architectural Support for Translation Table Management in Large Address
20 other sections not shown
adaptive protocol algorithm allocation applications average bandwidth benchmarks bits block size branch history Branch Prediction buffer bytes cache coherence cache line cache miss communication compiler Computer Architecture concurrency context switch copy cost cycles data block destage direct-mapped cache disk array effect entry evaluation execution false sharing Figure floating point global hardware hash history schemes IEEE implementation improve increase instruction interleaving invalidation J-Machine Kbytes latency load machine mechanisms memory access memory system migratory miss rate MP3D multiple multiprocessor node number of processors operating system overhead page table parallel parity logging pattern history tables performance pipeline prefetching problem programs reduce register file request RISC set-associative cache shared memory shows SIMD simulation single slots speedup synchronization thread throughput TickerTAIP tion TLB miss traces traffic transaction update vector virtual channels window workloads write write-invalidate