Processor Description Languages
Prabhat Mishra, Nikil Dutt
Elsevier, Jul 28, 2011 - Computers - 432 pages
Efficient design of embedded processors plays a critical role in embedded systems design. Processor description languages and their associated specification, exploration and rapid prototyping methodologies are used to find the best possible design for a given set of applications under various design constraints, such as area, power and performance.
This book is the first, comprehensive survey of modern architecture description languages and will be an invaluable reference for embedded system architects, designers, developers, and validation engineers. Readers will see that the use of particular architecture description languages will lead to productivity gains in designing particular (application-specific) types of embedded processors.
* Comprehensive coverage of all modern architecture description languages... use the right ADL to design your processor to fit your application;
* Most up-to-date information available about each architecture description language from the developers...save time chasing down reliable documentation;
* Describes how each architecture desccription language enables key design automation tasks, such as simulation, synthesis and testing...fit the ADL to your design cycle;
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Chapter 3 MIMOLAA Fully Synthesizable Language
A Structural Processor Modeling Language for Retargetable Compilation and ASIP Design
A Uniform ADL for Embedded Processor Modeling Implementation and Software Toolsuite Generation
An ADL for Software Toolkit Generation Exploration and Validation of Programmable SOC Architectures
Chapter 7 ASIP Meister
An ADL for Designing Applicationspecific Instruction Set Extensions
Chapter 9 MADLAn ADL Based on a Formal and Flexible Concurrency Model
ObjectOriented Specification of Complicated Instruction Sets and Microarchitectures
Chapter 11 Processor Design with ArchC
An ADL for Designing Single and Multiprocessor Architectures
A Formal Language for Specification Compilation and Synthesis of Custom Embedded Processors
Chapter 14 HMDES ISDL and Other Contemporary ADLs
Other editions - View all
ADL specification ADL++ algorithm allocation application ArchC architecture description language artifact ASIP Meister assembly attributes automatically behavior binary cache compiled simulation components Computer configuration constraints core cycle cycle accurate simulator cycle-accurate data type datapath decode defined described Design Automation Dutt elements embedded processors embedded systems encoding example execution exploration FIGURE framework functional units hardware HMDES IEEE implementation input instruction set instruction set simulator instruction-set interconnect interface ISDL latency Leupers LISA operation MADL MAML mapping memory methodology microarchitecture MIMOLA Mishra module netlist NISC opcode operands optimizations OSM model output parallel parameters performance pipeline stages ports Proc processor architecture processor models queue register file retargetable compilation scheduling semantics shown in Fig SIMD slot structure syntax synthesis SystemC target processor template tion token managers validation variables verification Verilog VLIW Xtensa