Quantum computing for computer architects
Morgan & Claypool Publishers, Nov 15, 2006 - Computers - 147 pages
Quantum computationmay seem to be a topic for science fiction, but small quantum computers have existed for several years and larger machines are on the drawing table. These efforts have been fueled by a tantalizing property: while conventional computers employ a binary representation that allows computational power to scale linearly with resources at best, quantum computations employ quantum phenomena that can interact to allow computational power that is exponential in the number of Squantum bits in the system. Quantum devices rely on the ability to control and manipulate binary data stored in the phase information of quantum wave functions that describe the electronic states of individual atoms or the polarization states of photons. While existing quantum technologies are in their infancy, we shall see that it is not too early to consider scalability and reliability. In fact, such considerations are a critical link in the development chain of viable device technologies capable of orchestrating reliable control of tens of millions quantum bits in a large-scale system. The goal of this lecture is to provide architectural abstractions common to potential technologies and explore the systemslevel challenges in achieving scalable, fault-tolerant quantum computation.The central premise of the lecture is directed at quantum computation (QC) architectural issues. We stress the fact that the basic tenet of large-scale quantum computing is reliability through system balance: the need to protect and control the quantum information just long enough for the algorithm to complete execution. To architectQCsystems, onemust understand what it takes to design and model a balanced, fault-tolerant quantum architecture just as the concept of balance drives conventional architectural design. For example, the register file depth in classical computers is matched to the number of functional units, the memory bandwidth to the cache miss rate, or the interconnect bandwidth matched to the compute power of each element of a multiprocessor. We provide an engineering-oriented introduction to quantum computation and provide an architectural case study based upon experimental data and future projection for ion-trap technology.We apply the concept of balance to the design of a quantum computer, creating an architecture model that balances both quantum and classical resources in terms of exploitable parallelism in quantum applications. From this framework, we also discuss the many open issues remaining in designing systems to perform quantum computation.
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Basic Elements for Quantum Computation
HighLevel Architecture Criteria and Abstractions
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adder allow ancilla block ancillary qubits arbitrary bandwidth Bell measurement bitstring cache channel classical computation classical control cnot gate communication computational tiles correcting codes data qubit decoherence described efficient encoded data entangled EPR qubits error-correcting code execution exponential factoring failure rate fault-tolerant Hadamard gate high-level input ion qubits ion-trap large-scale quantum laser level of recursion logical data logical gate logical operation logical qubit logical qubit tile modular exponentiation one-qubit optimization parameters performed phase-flip photons physical qubits probability procedure processing elements purification QLA architecture quantum algorithms quantum applications quantum architecture quantum circuit quantum data quantum error correction quantum information quantum logic quantum operations quantum register quantum system quantum teleportation qubit q reliability scheduler Shor's algorithm shown in Fig simulate speedup stabilizer Steane superposition syndrome extraction system designers teleportation-based three qubits threshold value Toffoli gate transfer two-qubit gates unitary operator universal quantum vector w-qubit