Speculative Execution in High Performance Computer Architectures
David Kaeli, Pen-Chung Yew
CRC Press, May 26, 2005 - Computers - 456 pages
Until now, there were few textbooks that focused on the dynamic subject of speculative execution, a topic that is crucial to the development of high performance computer architectures. Speculative Execution in High Performance Computer Architectures describes many recent advances in speculative execution techniques. It covers cutting-edge research projects, as well as numerous commercial implementations that demonstrate the value of this latency-hiding technique.
The book begins with a review of control speculation techniques that use instruction cache prefetching, branch prediction and predication, and multi-path execution. It then examines dataflow speculation techniques including data cache prefetching, address value and data value speculation, pre-computation, and coherence speculation. This textbook also explores multithreaded approaches, emphasizing profile-guided speculation, speculative microarchitectures, and compiler techniques.
What people are saying - Write a review
We haven't found any reviews in the usual places.
Other editions - View all
address prediction algorithm Annual International Symposium bandwidth benchmarks branch instruction branch prediction cache line cache misses compiler Computer Architecture conditional branch control flow cycle data dependence data speculation decode disambiguation eager execution entry example Figure frequency hardware helper thread IEEE IEEE/ACM implementation input set instruction cache instruction fetch instruction precomputation instruction prefetching International Conference issue Itanium latency load instruction load/store loop machine mechanism memory dependence speculation memory disambiguation memory references misprediction misspeculation multipath execution multiple non-speculative operand operations optimizations out-of-order parallelism path performance pipeline pointer predicate register predictor Proc Proceedings processor Programming Languages quadword queue recovery result scheduling Section spawning speculative execution speculative multithreaded speculative threads speedup static stream buffer stride subroutine superscalar Symposium on Computer Symposium on Microarchitecture synchronization target address techniques thread-level parallelism time-tag tion trace cache tree U.S. Patent unique computations update value prediction