TRON Project 1990: Open-Architecture Computer Systems
Springer Japan, Mar 1, 1991 - Computers - 436 pages
I wish to extend my warm greetings to you all on behalf of the TRON Association, on this occasion of the Seventh International TRON Project Symposium. The TRON Project was proposed by Dr. Ken Sakamura of the University of Tokyo, with the aim of designing a new, comprehen sive computer architecture that is open to worldwide use. Already more than six years have passed since the project was put in motion. The TRON Association is now made up of over 140 co m panies and organizations, including 25 overseas firms or their affiliates. A basic goal of TRON Project activities is to offer the world a human-oriented computer culture, that will lead to a richer and more fulfilling life for people throughout the world. It is our desire to bring to reality a new order in the world of computers, based on design concepts that consider the needs of human beings first of all, and to enable people to enjoy the full benefits of these com puters in their daily life. Thanks to the efforts of Association members, in recent months a number of TRON-specification 32-bit microprocessors have been made available. ITRON-specification products are continuing to appear, and we are now seeing commercial implementations of BTRON specifications as well. The CTRON subproject, mean while, is promoting standardization through validation testing and a portability experiment, and products are being marketed by sev eral firms. This is truly a year in which the TRON Project has reached the practical implementation stage.
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access key algorithm application programs Basic BTRON1 specification bytes cache clip video clock cycles command communication control compiler configuration data memory debugging defined device Dhrystone disk Electric entry environment evaluation execution Extended OS programs Figure FUJITSU functions Green Hills hardware Hitachi host hypermedia implementation inline expansion inline procedure INTERACTIVE INTERACTIVE Systems Corporation interface unit interrupt handler ISDT Japan Ken Sakamura kernel language layer load logical memory management microprocessor MIPS Mitsubishi Electric Corporation mode modules multiprocessor Oki Electric Industry operand operating system optional performance pipeline pixel porting priority procedure inlining processor profiles protocol queue real object real-time registers routine Sakamura scheduling shared memory signal software portability stack structure subset synchronization system bus system call Table tag memory target task switching Tokyo transfer TRON Project UNIX System user program