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System Organization and Performance
Components and Kuuipment
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1st operand input 2nd operand input 2nd trial circuit abovementioned absolute value binary digits binary system check circuits collation relay completion computing circuit computing networks computing units conjugate relays contact networks Control Circuit conversion circuit decimal number Diagram discrimination condition E.T.L. Mark energized essential subtraction expressed feed back Floating Point Algebraic formulas G-type hold circuit in-gate address integer Komamiya Line Printer logical mathematics make.contacts normal number word number key Number Tape Preparation number tape reader obtained operand input register operating coil operation order Order Tape Preparation order tape reader order word out.gate address output register performed Point Algebraic Adder punched relay networks relay r3 relay storage represents respectively result Room shown in Fig specification Storage System Storage Unit Supervisory Control Desk switch symbol Table tape perforator Tape Preparation Keyboard Tape Storage tested transfer check transformed VIII zero