ProceedingsAssociation for Computing Machinery, 1996 - Computer-aided design |
Contents
Session | 1 |
PCB SynthesisIs the Technology | 8 |
Jordi Cortadella Michael Kishinevsky Alex Kondratyev | 63 |
Copyright | |
24 other sections not shown
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Common terms and phrases
33rd Design Automation adder algorithm and/or a fee approach behavioral benchmark Boolean Boolean function capacitance CBILBO circuit clock clustering CMOS compaction complexity components Computer Computer-Aided Design concurrent constraints cubes cutset cycle data path decomposition Design Automation Conference design domain design process detected digital/hard copy edges eigenvector equations example fanin fanout fault coverage Figure flip-flops FPGA function graph hardware hazard-free high level synthesis IEEE implementation input vector insertion Integrated Circuits interconnect iteration layout linear placement logic synthesis loops lower bound method methodology minimize module assignment netlist node operation optimization output parameters partitioning path delay faults patterns performance power estimation problem Proc procedure processor reduced scan scheduling Section selected sequential shown signal simulation solution specific permission and/or spectral substrate switching Table techniques test sequence testability tion transistor transition variables verification vertex VHDL VLSI voltage XOR gate