Parallel Processing in Cellular ArraysAgainst an overview of the subject and a rigorous theoretical background, this book presents the author's approach to the organisation and implementation of massively parallel processing. Cellular arrays of a particular kind, called Distributed Functional structures (DF-structures), are introduced and described. DF-structures are related to content-addressed memories but are able to provide immediate realisation organ extensive nest of data-processing functions. They are specialised but economical, and they correspond well with the nature of the latest VLSI technology. This book discusses in detail the design and analysis of DF-structures. Numerous examples are given of how they can be applied to important numerical problems, non-numerical data processing and switching of data arrays. The author postulate that DF-structures could well constitute the basis of a new type of VLSI chip - the cellular microprocessor. In the final chapter the author's 'combined architecture' is compared with the newest conception of 'heterogeneous computing'. |
From inside the book
Results 1-3 of 44
Page 53
... the " kvľ q rows ( 2 ≤ q ≤m ) . of the words B , and k В B. The case of il From the description of the reading procedure above it follows that when signals z = 1 are simultaneously applied to the inputs z of several rows , the a ...
... the " kvľ q rows ( 2 ≤ q ≤m ) . of the words B , and k В B. The case of il From the description of the reading procedure above it follows that when signals z = 1 are simultaneously applied to the inputs z of several rows , the a ...
Page 56
... a cell is in this mode , the bus y contains 0 , which can affect the behaviour of other cells of the corresponding column . Z X 0 TR Z 1 J X α TR α NOT a ) b ) y x x c ) IS 0 CON Fig.4.3 . Different interconnection a - cells . Z α con d ) Z ...
... a cell is in this mode , the bus y contains 0 , which can affect the behaviour of other cells of the corresponding column . Z X 0 TR Z 1 J X α TR α NOT a ) b ) y x x c ) IS 0 CON Fig.4.3 . Different interconnection a - cells . Z α con d ) Z ...
Page 62
... cells of each column , this holds for the ... cells are used here to store each bit , each n - bit word requires an a - row of length 2n for its storage . This proves Statement 5 . 4.1.5 . Programmable Logic Array Statement 6. In an a 62.
... cells of each column , this holds for the ... cells are used here to store each bit , each n - bit word requires an a - row of length 2n for its storage . This proves Statement 5 . 4.1.5 . Programmable Logic Array Statement 6. In an a 62.
Contents
Parallel Computing | 7 |
Distributed | 18 |
Functional Possibilities of Distributed Functional | 51 |
Copyright | |
6 other sections not shown
Common terms and phrases
2-network 2a-element a-cell a-matrix a-structure adder algorithms applied arbitrary argument arrays associative memory automaton basic operation binary vector bits cell cellular automata chain channel Z coders column combined architecture compression connected considered contains control vector corresponding crossbar switch cycle described devices digital compressor disjunctive efficient example functional modules given GMPP hardware i-th row ILLIAC IV implementation input channels interconnection network iterative network j-th label vectors logical functions Massively Parallel Massively Parallel Processor matrix means memory elements method n-bit node non-numerical processing output parallel computing parallel computing systems parallel processing performance permutation pipeline positional sets problems processors Programmable Logic Array purpose computer r-th segment realized relational algebra residue number system result right boundary scheme sequential shown signal SIMD sorting networks specialized STARAN subsystems summands table look-up TR TR transformation truth table two-dimensional unitary code values variables vertical VLSI VPSs zeros