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Dynamic RAM Module Reference Guide
PROM Selection Guide 114
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4-BIT DYNAMIC 5-V Supply 74 TTL gates absolute maximum ratings Address Inputs BIT DYNAMIC RAM capacitors CAS cycling CAS high chip carriers chip select CHRL Column-address hold CSS high device dual-in-line package DYNAMIC RAM MODULES DYNAMIC RANDOM-ACCESS MEMORY early write cycle EPROMs free-air temperature range functional block diagram high-impedance High-level output voltage Input capacitance latched low to CAS MAX MIN MAX minimum cycle MULTIPORT VIDEO RAM Nibble-mode ns Delay ns Load operating free-air temperature output buffers Output disable Output Enable outputs open PARAMETER TEST CONDITIONS Power Dissipation PROGRAMMABLE READ-ONLY MEMORY programming pull-up resistor Pulse duration range and operating RAS low read cycle Read-command hold read-modify-write cycle recommended operating conditions recommended supply voltage refresh sequence requirements over recommended Row-Address Strobe SCLK Series 74 TTL shift registers single-in-line package supply voltage range SYMBOL Texas Instruments TR/QE tRLCL Write Enable Write-command hold Write-command setup