## Highly parallel signal processing architectures: 21-22 January 1986, Los Angeles, California |

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### Contents

j 61405 Fault tolerance techniques for highly parallel signal processing architectures J A Abraham Univ | 49 |

HARDWARE IMPLEMENTATION ISSUES | 97 |

Addendum | 176 |

Copyright | |

### Common terms and phrases

acousto-optic adders application arithmetic array manifold Array Processor bandwidth beamforming binary bit-serial bits bivector Bragg cell Caltech checksum matrix circuit column complex Computer Science Concurrent convolution correct dependence graph detector dimensional DMAC DOA vector dynamic range efficiency eigenvalues eigenvectors electronic elements encoding equation error detection example Fast Fourier Transform fault Fault-Tolerant faulty module faulty processor Figure frequency function H. T. Kung hardware IEEE implementation index-space input integrating interconnection Kung least squares linear algebra linear array machine matrix multiplication matrix-matrix matrix-vector methods node OLAP on-line optical processor optical system orthogonal outer product output overhead parallel performed plane point modulators primitives problem Proc processor array redundancy result rotation Saxpy scheme serial Signal Subspace singular value decomposition SMEM solution solve space spatial SPIE systolic array techniques tion tolerance triangular two's complement VLSI weighted checksum