Conference Record

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IEEE Operations Center., 1994 - Electronics

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Contents

Emerging LAN Structures
8
W2 Electric VehiclesNew Components
27
W3 Formal Methods in Software and Hardware Design
47
Copyright

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addition algorithms antifuse applications architecture array ASIC Autosophy bandwidth battery pack boundary scan buffer bytes capability cell charge chip circuit clock components configuration cost cycle data compression delay density device discharge drive electric electronic encoding engineering EPROM example Fibre Channel FIFO Figure FPGA frequency functions fuzzy logic gate hardware Holtz IEEE IGBT image compression implemented input integrated interconnect interface JTAG LabVIEW load logic synthesis Lossless Data Compression manufacturing memory method microcontroller mode modules MOSFET node operation optimization output package Patent performance pixels port power management PQFP problem processor QSOP QuickLogic routing sensor signal simulation specific speed SRAM standard switching element synthesis tools temperature transmission VHDL virtual VMEbus voltage Xilinx

Bibliographic information

TitleConference Record
ContributorsInstitute of Electrical and Electronics Engineers, Institute of Electrical and Electronics Engineers. Los Angeles Council, Institute of Electrical and Electronics Engineers. San Francisco Bay Area Council, Electronic Representatives Association (U.S.). Northern California Chapter, Electronic Representatives Association (U.S.). Southern California Chapter
PublisherIEEE Operations Center., 1994
Original fromthe University of Michigan
DigitizedJan 10, 2008
  
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