Architecture of Computing Systems - ARCS 2008: 21st International Conference, Dresden, Germany, February 25-28, 2008, ProceedingsTheo Ungerer, Christian Hochberger, Rainer G. Spallek This book constitutes the refereed proceedings of the 21st International Conference on Architecture of Computing Systems, ARCS 2008, held in Dresden, Germany, in February 2008. The 19 revised full papers presented together with 2 keynote papers were carefully reviewed and selected from 47 submissions. The papers cover a wide spectrum reaching from pre-fabrication adaptation of architectural templates to dynamic run-time adaptation of deployed systems with special focus on adaptivity and adaptive system architectures. The papers are organized in topical sections on hardware design, pervasive computing, network processors and memory management, reconfigurable hardware, real-time architectures, organic computing, and computer architecture. |
Contents
| 6 | |
| 7 | |
| 8 | |
| 9 | |
TopologyAware Replica Placement in FaultTolerant Embedded Networks | 23 |
Design of Gate Array Circuits Using Evolutionary Algorithms | 38 |
Part II Pervasive Computing | 51 |
An Advanced Adaptation Algorithm for Pervasive Applications | 52 |
A Novel Routing Architecture for FieldProgrammable GateArrays | 144 |
Part V RealTime Architectures | 159 |
A Predictable Simultaneous Multithreading Scheme for Hard RealTime | 161 |
Soft RealTime Scheduling on SMT Processors with Explicit Resource Allocation | 173 |
A HardwareSoftware Codesign of a Coprocessor for RealTime Hyperelliptic Curve Cryptography on a Spartan3 FPGA | 188 |
Part VI Organic Computing | 202 |
A Reference Architecture for Selforganizing ServiceOriented Computing | 205 |
Towards Selforganising Smart Camera Systems | 220 |
Steering and Body Postures While Cornering | 68 |
Part III Network Processors and Memory Management | 82 |
A Hardware Packet ReSequencer Unit for Network Processors | 83 |
Managing Distributed Memory in an Autonomous Multimaster Environment | 98 |
Part IV Reconfigurable Hardware | 114 |
Dynamic Reconfiguration of FlexRay Schedules for Response Time Reduction in Asynchronous FaultTolerant Networks | 115 |
Synthesis of Multidimensional HighSpeed FIFOs for OutofOrder Communication | 130 |
Using Organic Computing to Control Bunching Effects | 232 |
Part VII Computer Architecture | 245 |
A Generic Network Interface Architecture for a Networked Processor Array NePA | 246 |
Constructing Optimal XORFunctions to Minimize Cache Conflict Misses | 261 |
From Entropy Viewpoints | 273 |
| 286 | |
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Common terms and phrases
active adaptation address bits algorithm allocation application approach autonomic BCCr behaviour biconnected component branch predictor Brinkschulte buffer bunching cache clock cycles communication Computer configuration conflict miss coprocessor cross-over deadline distributed driver dynamic segment embedded systems entropy environment evaluation evolutionary algorithms execution FIFO FlexRay flow FPGA hardware hash functions HECC hit ratio IEEE implementation input instructions interface internal IP core isnk isrc latency lifts logic blocks managing element Max Rel MicroBlaze node OpenRISC operation optimal out-of-order output overhead packet paper parameters performance pixel prediction function priority processing proposed queue Re-Sequencer real-time reconfiguration reference architecture registers replica placement routing multiplexers SaM-Requester scenario scheduling Section self-organisation sensor service-oriented simulation simultaneous multithreading slot Smart Camera SMT processors SoCs static strategy Table task set thread tile tion WCET Xilinx XOR-functions