Computer Aided Analysis of Insulated Gate Field Effect Transistors
Department of Electrical Engineering, Stanford University, 1969 - Field-effect transistors - 189 pages
The classical analysis of Insulated Gate Field-Effect Transistors (IGFET) is reviewed and the corresponding theory is compared with experimental characteristics. The limitations of this theory are indicated and the reasons for the limitations are explained in terms of the device physics. Two operating configurations which do not comply with the classical theory are subsequently analyzed with the aid of a digital computer; these are low-level current operation for gate voltages near threshold, and punch-through operation for short devices. The numerical data obtained from the low-level analysis is compared with experimental V-I characteristics, and it is shown that the device can be accurately modeled using the classical surface physics equations. Algebraic approximations, which offer certain advantages over numerical analysis, are shown to adequately describe transistor operation over certain current ranges. Derivations of the finite difference equations for numerical iterative analysis of the IGFET are described in detail. Certain stability problems are found to occur and methods for avoiding these are presented. Results of the analyses of short-channel devices are presented in the form of three-dimensional projections of the potential and carrier distributions. (Author).
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A Historical Background
Numerical Solution of Threshold Current
13 other sections not shown
assumed band bulk charge channel length Chapter charge per unit classical constant mobility corresponding critical field current density curves Debye length defined depletion region derivative difference equations diffusion current drain current drain region drain voltage Dsat effect error fast surface Fermi level Field-Effect Transistor finite difference function gate voltage Hofstein hole density HOLE DISTRIBUTION hole quasi-Fermi level IGFET increase Insulated Gate interface ionized donor iteration line integral linear low-level mesh points mesh spacings method microns mobility variations negative differential mobility normalized numerical analysis numerical calculations obtained oxide thickness p-n junction parameter plot Poisson's equation Potential distribution punch-through saturated velocity semiconductor surface shown in Fig Solid State Electron solution solved source junction space charge substrate bias substrate doping density surface potential theoretical TRANSFER CHARACTERISTICS unit area V-I characteristics v/cm values of gate vector velocity saturation volts width zero