Protocols for high-speed networks, III: proceedings of the IFIP WG6.1/WG6.4 Third International Workshop on Protocols for High-Speed Networks, Stockholm, Sweden, 13-15 May, 1992
As the speed of networks increase, users expect to deliver high bandwidth to their applications. There is much debate in the research community over the choice of protocols for these new networks. Discussion about new protocol architectures remains at center stage in the research community even as the user community continues to standardize protocols such as Asynchronous Transfer Mode (ATM). New transport protocols as well as resource management mechanisms are being designed to support real time multimedia applications on gigabit networks. This volume focuses on state-of-the-art protocol design and efficienct implementation techniques, interfacing high speed networks to high performance host computers and ATM as a protocol for high speed networks.
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Putting the Transport Layer on VLSI the PROMPT protocol chip
First Performance Results
Protocol architecture II
12 other sections not shown
adaptation layer Address Tables algorithm applications architecture ATM networks ATMNA atom bandwidth bridge bypass test bytes CCB manipulation CCITT checksum cipher block chaining communication Computer data units datagram delay DQDB encryption error detection event FDDI FIFO Figure flow control frame buffer gigabit hardware header High-Speed Networks ICMP IEEE IFIP implementation interface IP router logical connection Mbps mean sojourn memory misordering MSNL multicast multimedia multiplexing multiprocessor node operation ordering constraints packet processing parallel parameters path performance pipeline Pmax processor protocol data unit protocol entities protocol processing protocol stack Protocols for High-Speed queue received remote request ring scheme segments sender sequence number simulation slot reuse SMDS SNMP source routing special resources station subnetwork switch throughput tion TPDU traffic transmission transmit transport protocol TSDU types virtual circuit