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DIGITAL DEVICE PROCESSING
DIGITAL DEVICE RESULTS
ANALOG DEVICE PROCESSING
4 other sections not shown
2DEG AlGaAs AlGaAs/GaAs analog device annealing temperature barrier height beam behavior bias calibration capacitance cell circuit citric co-sputtered concentration contact lithography cross-section gate deposition determined device fabrication device processing digital device diode doping dose drain electron etch rate exposure FLDMRK FLDMRK FLDMRK GaAs gate lines gate metal gate process gate resistance gate width H2O rinse I-V characteristics implant increased InGaAs layout linewidth mask measured mesa MESFET MODFET ohmic contact organic rinse output conductance Oxide strip P(MMA-MAA parameters parasitic pattern performance PMMA probe propagation delay psec rapid thermal annealing recess etch reduced resistor resistor loads ring oscillator rinse and dry sample Schottky Schottky diode sheet resistance short channel effects shown in Figure source resistance sputter step substrate superlattice buffer superlattice-buffer surface thickness threshold voltage transconductance undercut uniformly-doped values versus gate length wafer