A Digital Design Methodology for Optical ComputingOptical computing can have significant advantages over electronic computing in terms of system speed, but only if the digital design exploits regularity. The design methods must be simple in order to manage the complexity of optics in a digital computer. This book presents a valuable new methodology |
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Page 15
... signal skews can be kept within femtoseconds , spatial bandwidth is not sacrificed , optical interconnects can be implemented with off - the - shelf glass components , and the circuits are not that much wider or deeper . Thus regular ...
... signal skews can be kept within femtoseconds , spatial bandwidth is not sacrificed , optical interconnects can be implemented with off - the - shelf glass components , and the circuits are not that much wider or deeper . Thus regular ...
Page 104
... signal skews inherent in electronic digital logic [ 28 , 50 ] are resolved by increasing the time window for signals to arrive at a gate , which reduces per - line bandwidth . This time skew is partially alleviated by registering signals ...
... signal skews inherent in electronic digital logic [ 28 , 50 ] are resolved by increasing the time window for signals to arrive at a gate , which reduces per - line bandwidth . This time skew is partially alleviated by registering signals ...
Page 105
... skews are not inherent in free - space optical logic because the use of a planar architecture , pulsed mode optical logic , and regular interconnects reduces signal skews to the extent that gate - level pipelining is made possible even ...
... skews are not inherent in free - space optical logic because the use of a planar architecture , pulsed mode optical logic , and regular interconnects reduces signal skews to the extent that gate - level pipelining is made possible even ...
Contents
Introduction | 1 |
Optical Logic Devices and Interconnects | 9 |
A Few Architectural Approaches for General Purpose | 29 |
Copyright | |
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Common terms and phrases
algorithm approach architecture array of optical AT&T Bell Laboratories bandwidth banyan beams binary binary address bitonically sorted CAM word chip circuit depth complement complexity Connection Machine content addressable memory copies cost crossover interconnect crossover stages decoder tree design techniques digital computing digital design digital optical computing dual-rail fan-in and fan-out fan-out stage fault four-bit free space free-space optical function gate count gate delays gate-level pipelining hardware hypercube input image input variables interconnection pattern latency layout limited Logic Unit masks matrix microoptics minterms needed operation optical design optical implementation optical interconnects optical logic devices optical logic gates OR-NOR output plane packet parallel sorting network path perfect shuffle prism array problem random access memory regular interconnects router S-SEED serial adder shown in Figure signal skews sorting network sorting node speed switching components symbolic substitution two-output VLSI width xys xys xys