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Accumulator addr address bits AUTO mode baud rate byte processor capacitance ceramic resonator chip CHMOS circuit configuration crystal CSMA/CD Data Pointer device disabled DMA channels DMA Freeze Mode DMA transfer DPTR Enable Encoding EPROM execution external clock external data memory external interrupt external Program Memory FIFO DMA Freeze frame hardware HMOS I/O port Immediate Command INCREMENT Input FIFO instruction instruction cycle Intel interface internal CPU internal pullups interrupt request Jump latch loaded logic loop machine cycle microcontroller module MOVX NRZI on-chip operation oscillator Output FIFO PL/M Program Counter program verification PSEN pullups receive buffer reset SDLC secondary station serial port service routine shown in Figure signal Special Function Registers subroutine Timer Timer/Counter tion Valid Voltage write XTAL1 XTAL2 zero