Proceedings |
Contents
Algebra I | 4 |
Circuits I | 20 |
LowPower Dissipation MVL Integrated Circuits for VLSI MOS Technologies | 33 |
Copyright | |
21 other sections not shown
Common terms and phrases
4-valued adder algebras of order algorithm array basic binary logic binary threshold functions Boolean C₁ cell clause CMOS column complex Computer corresponding costtable current-mode decoder defined Definition denotes detector devices elements example expert system Figure finite func function f functions realized fuzzy Fuzzy Logic gate given h₂ IEEE implementation input ISMVL latin square Lemma LFSR linear literals Liu Yunfeng logic circuits logic formula logic values minimal minterms MODSUM monotone-increasing multi-valued multi-valued logic multiple-valued logic multiplication NMOS obtained operation optical order w+ output encoding pan-valid pass transistor permutation PLA's polynomial Post algebras Proc product terms programmable logic array Proof regular ternary logic representation represented shown in Fig signals simulation staircase functions t-norm ternary logic functions ternary majority functions Theorem threshold voltage tion transistors truth tables Type 2 PLA vector VLSI x₁