Computer Systems Architecture |
Contents
DESCRIPTION OF COMPUTER SYSTEMS | 31 |
The Building Blocks and Their Interactions | 75 |
POWERFUL CENTRAL PROCESSORS | 135 |
Copyright | |
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Common terms and phrases
2's complement adder AFIPS algorithm architecture arithmetic assume bits block buffer Burroughs B1700 bytes cache channel Chapter chip concurrency control unit D-unit decoding digits disk drum example execution exponent fetch FIFO floating-point format function hardware high-level language I/O devices IBM System/370 ILLIAC ILLIAC IV implemented index register input instruction set integer interface interleaving interrupt loaded logic look-ahead machine mantissa mapping memory modules microinstruction microprogram MIMD minicomputers minor cycle mode MULTICS multiplier notation opcode operand operating system optimal organization output page fault parallel perform Petri Net pipeline Proc procedure processors queue reference requests result scheduling scheme Section segment sequence shift shown in Figure SIMD single stack STARAN step storage stored subtraction switch synchronous Table task TI ASC tion transfer UNIBUS variable vector virtual memory word