Programming the Z80 |
Contents
LIST OF ILLUSTRATIONS | 17 |
TABLE OF CONTENTS | 28 |
BCD Table | 35 |
Copyright | |
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Common terms and phrases
accumulator ADD HL addition address bus ADR1 ADR2 ADR3 arithmetic binary bit position Byte Codes CALL SUB carry bit CB CB CB chapter contents DATA BUS Data Flow DD FD decimal DECODER decremented Description device digits DJNZ eight-bit example execution Exercise fetch flowchart Format Function hexadecimal HL register pair Implicit INC HL incremented index register indexed input input/output interrupt jump LD BC LD HL loaded loop low order memory location addressed MHz Addressing Mode microprocessor MULT multiplication NOADD OBJECT CODE offset value one's complement opcode operand operation output P/V N C no effect parity PC OUT STATUS program counter representation reset Rotate S Z H P/V N C shown in Figure stack pointer status register STATUSI struction subroutine subtraction symbolic tion two's complement usec zero