Sub-threshold Design for Ultra Low-Power SystemsAlthough energy dissipation has improved with each new technology node, because SoCs are integrating tens of million devices on-chip, the energy ex pended per operation has become a critical consideration in digital and ana log integrated circuits. The focus of this book is sub-threshold circuit design, which involves scaling voltages below the device thresholds. In this region, the energy per operation cair be reduced by an order of magnitude compared to conventional operation but at the cost of circuit performance. In many emerging applications such as self-powered RFID, wireless sensors networks, and portable devices (PDAs, medical monitoring, etc. ), the overall battery life time is the primary design metric. Sub-threshold design can also be applied to burst mode applications (e. g. , a cell-phone processor) where the process spends a significant amount of time in the standby mode. The supply voltage can be reduced to the deep sub-threshold region, dramatically saving power in logic and memory. Extremely low-power design was first explored in the 1970s for the design of applications such as wristwatch and calculator circuits. Dr. Eric Vittoz pioneered the design and modeling of weak-inversion circuits. In this book, Eric provides his perspective on the evolution of sub-threshold circuit design. Dr. Eric Vittoz and Dr. Christian Enz introduce key models necessary for the design and optimization of weak inversion circuits. Design using weak inversion has been widely adopted in analog circuits, and Eric introduces the key design considerations. |
Contents
| 1 | |
Origins of Weak Inversion or Subthreshold Circuit | 7 |
Minimizing Energy Consumption | 25 |
EKV Model of the MOS Transistor | 49 |
Digital Logic | 75 |
Subthreshold Memories | 103 |
Analog Circuits in Weak Inversion | 147 |
System Examples | 167 |
A Acronyms | 191 |
Index | 205 |
Other editions - View all
Sub-threshold Design for Ultra Low-Power Systems Alice Wang,Benton Highsmith Calhoun,Anantha P. Chandrakasan No preview available - 2006 |
Sub-threshold Design for Ultra Low-Power Systems Alice Wang,Benton Highsmith Calhoun,Anantha P. Chandrakasan No preview available - 2010 |
Common terms and phrases
10T bitcell 6T bitcell activity factor adder analog circuits applications bitcell bitline bitline leakage block capacitance CMOS curve decreases delay devices differential pair Digest of Technical digital circuits drain current equation exponentially Figure FIR filter frequency function gate voltage IEEE implementation increases input Ispec Kogge-Stone adder leakage current leakage energy logic Low-Power low-voltage lower M₁ memory minimize minimum energy point minimum voltage MOSFET N-channel nMOS node noise normalized nVth optimal optimum VDD output P-nMOS parameters plot pMOS precharge process corners processor ratio read access Read SNM reduced register file resistor RFID ring oscillator saturation Section sensor shows simulation SRAM static CMOS strong inversion sub-threshold circuits sub-threshold current sub-threshold operation sub-threshold region supply voltage temperature test chip threshold voltage transconductance transmission gate UDVS VDDopt Vittoz voltage dithering voltage scaling weak inversion wordline workload