AGP System Architecture
AGP System Architecture provides an overview of the technology, a detailed description of the specification, and a practical tutorial for mastering AGP. Comprehensive and concise, it presents all the information you need to understand and utilize this proliferating technology. In particular, this book focuses on 3-D graphics and video-related issues - the applications most served by AGP.
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16 bytes 4X mode AD_STBx signals AD_STBx strobes add-in card AGP bus AGP Command AGP master AGP target AGP transactions arbiter bus master byte enables bytes of data bytes of read C/BE bus C/BE busses connector core logic data and byte data phase data transfer rate deasserted DEVSEL dword edge of clock edge of SB_STB eight bytes falling edges fast write transaction final four bytes GND GND GND graphics accelerator indicating initial data block interrupt request latch data main memory master latches Master sampling MindShare motherboard PCI bus PCI transactions pipelining pull-up resistor read data transaction read transaction request queue rising edge SBA command SBA port second data block second falling edge second transaction Sideband Address status bus Status Register subsequent data block System Architecture target deasserts target latches texture maps throttle point transaction request transfer length TRDY Vddq voltage wait write data transactions