High Speed Computation: Vector ProcessingThe University., 1980 - Vector analysis |
Contents
INTRODUCTION | 1 |
FUNCTIONAL OVERVIEW | 1 |
FLOATINGPOINT ARITHMETIC THEORY | 1 |
Copyright | |
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Common terms and phrases
2's complement ADD XINC adder algorithm APMA APSTATUS APTR arithmetic array BGT LOOP bit-reverse BOOTSTRAP BPTR clock column CTL bit CYBER data pad bus data word device address dot product DOTPROD DPBS DPX,MD execution exponent FADD FADD FM FADDR fetch field fixed-point flag floating-point adder floating-point number FMUL FMUL DPX FMULR format FORTRAN hardware host computer host CPU host interface host memory I/O device INCDPA INCMA incremented input register instruction cycle instruction word integer interrupt IODRDY LDAPS loaded main data memory mantissa matrix memory address register MFLOPS MNEMONIC mode OCTAL op-codes operands output performance pipeline PNLBS processor refer to note reset result s-pad operation scalar scalar processor SETMA SP SPD specified SPFN status register storage stored subroutine supervisor table memory TMRAM vector length vector processing write zero