A Practical Introduction to Computer ArchitectureIt is a great pleasure to write a preface to this book. In my view, the content is unique in that it blends traditional teaching approaches with the use of mathematics and a mainstream Hardware Design Language (HDL) as formalisms to describe key concepts. The book keeps the “machine” separate from the “application” by strictly following a bottom-up approach: it starts with transistors and logic gates and only introduces assembly language programs once their execution by a processor is clearly de ned. Using a HDL, Verilog in this case, rather than static circuit diagrams is a big deviation from traditional books on computer architecture. Static circuit diagrams cannot be explored in a hands-on way like the corresponding Verilog model can. In order to understand why I consider this shift so important, one must consider how computer architecture, a subject that has been studied for more than 50 years, has evolved. In the pioneering days computers were constructed by hand. An entire computer could (just about) be described by drawing a circuit diagram. Initially, such d- grams consisted mostly of analogue components before later moving toward d- ital logic gates. The advent of digital electronics led to more complex cells, such as half-adders, ip- ops, and decoders being recognised as useful building blocks. |
Contents
| 3 | |
| 11 | |
| 17 | |
Hardware Design Using Verilog | 97 |
A Historical and Functional Perspective | 143 |
Basic Processor Design | 169 |
Measuring Performance | 213 |
Arithmetic and Logic | 223 |
2 | 350 |
Linkers and Assemblers | 397 |
Basics of Digital Logic | 449 |
Compilers | 451 |
Operating Systems | 495 |
48 | 534 |
Efficient Programming | 535 |
A MIPS32 Simulator | 561 |
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Common terms and phrases
add_1bit adder addi addr address space algorithm Aline allocated architecture arithmetic assembler assembly language assign Atag Aword basic behaviour bits block branch bytes cache line called caller circuit clock compiler components consider control-flow cycle data-path decode define described device digits EDSAC encoding example execution fetch Figure function gates general-purpose register Hamming weight handler hardware i-th implementation initialise input wire instruction integer interface iteration kernel load logic loop machine code main memory malloc means memory access module multiplexer multiplier n-bit offset opcode operands operation output wire partial product perform pipeline problem processor produce register file register operands represent result ripple-carry adder signal simply speculative execution SPIM stack stage statement step superscalar symbol table syscall task translation truth table typically update vector vector processor Verilog virtual address write zero