Proceedings, ... International Symposium on VLSI DesignIEEE Computer Society Press,., 1997 - Electronic digital computers |
Contents
The InfoPad Project Review and Lessons Learned | 2 |
Low Power Design Methodologies | 11 |
and Applications | 18 |
Copyright | |
27 other sections not shown
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Common terms and phrases
adder algorithm allocation application approach architecture ATPG Bangalore block capacitance cell chip clock CMOS coefficient column computation constraints cost counter critical path cube cycle data path decoder delay fault detected edge embedded fanout fault coverage fault simulation FIR filter flip-flops formal verification FPGA frequency functional unit gate graph gray coded hardware heuristic Hyderabad IEEE implementation India input interface internal iteration layout logic logic synthesis memory minimize modules multiple netlist node obtained operation optimization output partitioning path delay patterns performance pipelined power dissipation problem Proc procedure processor proposed reduce reset routing scheduling scheme selected self-loops sequence sequential circuits shown in Figure signal simulation switch synthesis Table task Tech technique test set testability Texas Instruments tion transistor transition variables VHDL VLSI voltage VSI/VLSI Design 97 wire Xilinx