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annealing temperature Appl atoms band edge bandgap calculated results California channel characteristics Chikusa-ku CMOS conduction band contact resistivity decrease Department of Electrical device DG-MOSFET direct tunneling doping levels DotFET double barrier DT currents electron charging electron temperature emulator energy floating gate function gate bias gate dielectric growth heteroepitaxial high-k dielectrics Hirose hut clusters interface Ishikawa J.C.Angus Japan SILICON MATERIALS K.Shibuki La Jolla Lett LPCVD measured Metall Miyazaki MOSFET Nagoya nanocrystal nanometer nm-thick P.Pirouz phonon Phys plasma oscillations Proc QD floating gate QD floating-gate quantum computing quantum dots Quantum Effect resonant tunneling resonant tunneling diodes room temperature SBHs schematic Science and Technology self-assembled semiconductor shown in Fig SiGe SILICON MATERIALS-2001 August simulation SiO2 SRTMOST stack strain structure substrate Surf surface T.Suzuki Technol Technology of SILICON thermal thickness Tokyo trap levels tunnel diodes tunneling layer ultrathin University University of Tokyo valence band voltage Y.Ikuhara ZrO2
Page 73 - This work was partly supported by a Grant-in-Aid for Scientific Research from the Ministry of Education, Science and Culture and by TOTO Co.
Page 29 - Center for Cooperative Research in Advanced Science and Technology, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603 Initial nitridation process on clean Si(100)-2xl surfaces has been investigated by scanning tunneling microscopy and scanning tunneling spectroscopy.
Page 53 - School of Electrical Engineering and Computer Science University of Central Florida Orlando, FL...
Page 23 - Center for Solid State Electronics Research and Department of Electrical Engineering, Arizona State University, Tempe, AZ...
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Page 38 - REFERENCES 1. S. Tiwari, F. Rana, H. Hanafi, H. Hartstein, EF Crabbe and K.
Page 34 - SM Sze, Physics of Semiconductor Devices, 2nd ed., Chap. 5, John Wiley & Sons, New York (1981).