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algorithm applications approach architecture bits buffer building block cache CDFG clock cycle coefficient compiler complex compression computation conflict graph constraints context words CORBA core cost function data flow data transfer dataflow datapath DCMI delay Design Automation Digital dynamic edge embedded systems example execution exploration expression trees filter functional units hard disk hardware heuristic I/O schedule IEEE implementation input integrated interface interval iteration kernel latency loop merging method methodology middleware minimal Object Computing opcode operand operation optimal output overlap partition PDFs performance pipeline path port power management pre-fetching problem processor real-time reconfigurable computing reduce register file represent retiming retiming node RTGEN run-time scheduler SDF graph Section sequence shown in Figure simulation software-tasks solution specification status register storage supply voltage synchronization synthesis Table TAOC task technique tion tokens values vector Verilog VLIW WCET XBadge