IWarp: Anatomy of a Parallel Computing System
Although researchers have proposed many mechanisms and theories for parallel systems, only a few have actually resulted in working computing platforms. The iWarp is an experimental parallel system that was designed and built jointly by Carnegie Mellon University and Intel Corporation. The system is based on the idea of integrating a VLIW processor and a sophisticated fine-grained communication system on a single chip. This book describes the complete iWarp system, from instruction-level parallelism to final parallel applications. The authors presents a range of issues that must be considered to get a real system into practice. They also provide a start-to-finish history of the project, including what was done right and what was done wrong, that will be of interest to anyone who studies or builds computer systems.
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The Processing Agent
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AAPC algorithms allocated allows application array module linker bandwidth bits block buffer bugs byte cache chapter clock beats communication agent communication bus communication system computation configuration connection group data words DIFAR DlFAR DlFAR DlFAR double-precision event handler example execution floating point operations floating point units Fortran functional units gate hardware host implementation input queue integer Intel interface iWarp array iWarp component iWarp node iWarp processor iWarp project iWarp system iWarp torus iwRTS kernel latency LIW instruction load logical channels loop mapping memory access message passing nodeprogram operands output queue overhead parallel program parallel system parallelizing compiler pathway header performance pipeline port problem processing agent register file result routing runtime system scheduler shown in figure software forwarding software pipelining spool synchronization systolic array tion tool chain torus Unix Warp machine workstation