Thirty-nine papers from the May 2002 symposium present recent developments in algebra, logical design, circuit design, spectral techniques, and decision diagrams pertinent to the field of multiple- valued logic. The authors discuss such topics as voltage comparator circuits for multiple-valued CMOS logic, the calculation of fixed- polarity polynomial expressions for multiple-valued logic functions, Chrestenson spectrum computation using Cayley color graphs, and an evaluation of static variable ordering heuristics for multiple-valued decision diagram construction. No subject index. Annotation copyrighted by Book News, Inc., Portland, OR.
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Logical Design II
Partial Hyperclones on a Finite Set
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addition algebra algorithm analog applied approach axioms binary bits block Boolean calculation called circuit CMOS coding comparator complete components computation consider consists construction converter corresponding decision defined Definition denote determined diagram digit DSMs element equal equation example exists expressions extension fault Figure finite formula function function f gate given holds IEEE implementation increase input introduced inverter lattice Lemma linear logic maximal measure memory method minimal minterm multi-valued multiple multiple-valued Multiple-Valued Logic nodes Note obtained operation output partial hyperclone performance possible presented problem Proc Proof properties proposed proved quantum reduced reference relation representation represented respectively satisfies selection shown shows signal simulation solution Step structure Table technique ternary Theorem theory threshold tion transform truth University variable vector voltage