The Eighth International Symposium on Multiple-Valued Logic: Proceedings |
Contents
A triState Logic Family | 1 |
A Suggested Approach to Computer Arithmetic for Designers of MultiValued | 33 |
Special Purpose Ternary Computer for Digital Filtering | 47 |
Copyright | |
22 other sections not shown
Common terms and phrases
applications array axiom B-ternary logic function Berger code binary Boolean algebra clock complement complete distributive lattice component Corollary corresponding d-modules decision algorithm decomposition defined Definition denoted detection device digital filter distributive lattice equation example filter finite flow table full adder fuzzy gates given implementation input change integer integrated circuits Lemma logic design logic hazards logical value M₁ M₂ many-valued logic matrix memory element minterm multiple multiple-valued logic multivalued decision multivalued logic n-tuple networks number systems obtained operations output p-valued P₁ paramodulation positive unate Post algebra prefilter problem procedure Proof protection mechanisms R-flop radix realization representation represented security policies sequential machines shown in Figure static hazard subset switching circuits ternary ternary computer Theorem threshold tion transformation truth table truth values two-valued unary unary operators valued logic variables X₁ Y₁ zero