Network Processors: Architecture, Programming, and Implementation
Network processors are the basic building blocks of today's high-speed, high-demand, quality-oriented communication networks. Designing and implementing network processors requires a new programming paradigm and an in-depth understanding of network processing requirements. This book leads the reader through the requirements and the underlying theory of networks, network processing, and network processors. It covers implementation of network processors and intergrates EZchip Microcode Development Environment so that you can gain hands-on experience in writing high-speed networking applications. By the end of the book, the reader will be able to write and test applications on a simulated network processor.
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access networks addressing mode addressing mode type algorithms applications architecture bits block BPDU bridge bytes chapter classification command Computer core data structures decoder define described destination egress engines entry Ethernet example executed EZchip field Figure flag flow FMEM forwarding frame buffer frame memory function Gbps hardware hash table header host IEEE IETF implementation ingress input instruction interface Internet IP address IPv4 IPv6 ITU-T jump label layer lookup MAC addresses MACRO match mechanism microcode MPLS multicast multiplexed network processors node NOPs Operands operation Optical output packet processing parallel path Payload pipeline pointer port Protocol Provider queue Random Early Detection result RMEM routers routing scheduling specific subsection switch fabric synchronization T-MPLS technologies Telecommunication TOPmodify TOPparse TOPresolve TOPsearch updated Virtual VLAN WiMAX XGMII