Structured Computer OrganizationCompletely updated, this book explains how computer designers can follow the structured model to develop efficient hardware and software systems. New information has been included on UNIX, OS/2, INTEL 8088/80286/80386, Motorola 68000/68020/68030 and RISC machine. The operation of a typical IBM PC clone is now described in detail at the chip level. |
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Page 310
... interrupt hap- pened . The computer then continues as though no interrupt had hap- pened . A key concept related to interrupts is transparency . When an interrupt hap- pens , some actions are taken and some code runs , but when ...
... interrupt hap- pened . The computer then continues as though no interrupt had hap- pened . A key concept related to interrupts is transparency . When an interrupt hap- pens , some actions are taken and some code runs , but when ...
Page 311
... interrupt occurs . The printer interrupt service routine ( ISR ) is started up , as shown in Fig . 5-54 . Printer interrupt priority 2 Disk interrupt priority 4 held pending RS232 interrupt priority 5 RS232 ISR finishes disk interrupt ...
... interrupt occurs . The printer interrupt service routine ( ISR ) is started up , as shown in Fig . 5-54 . Printer interrupt priority 2 Disk interrupt priority 4 held pending RS232 interrupt priority 5 RS232 ISR finishes disk interrupt ...
Page 312
... interrupt service routine . On the 8088 , the table of interrupt vectors starts at absolute address 0 , with 4 bytes per entry . On the 80286 and 80386 , the interrupt vectors are 8 - byte segment descrip- tors and the table can begin ...
... interrupt service routine . On the 8088 , the table of interrupt vectors starts at absolute address 0 , with 4 bytes per entry . On the 80286 and 80386 , the interrupt vectors are 8 - byte segment descrip- tors and the table can begin ...
Contents
INTRODUCTION | 1 |
THE OPERATING SYSTEM MACHINE LEVEL | 6 |
THE MICROPROGRAMMING LEVEL | 161 |
Copyright | |
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address lines address space addressing modes algorithm architecture arithmetic assembly language asserted bits Boolean buffer bus cycle buses byte cache called character chip circuit clock compiler contains conventional machine level coprocessor data path decoding disk entry example executed fetch floating-point function gates goto hardware I/O devices implement input instruction set integer Intel interrupt jump latch loaded logical machine language macro main memory master memory address memory word microinstruction microprocessor microprogram MIPS module Motorola MULTICS multiple multiprocessor needed nsec opcode operand operating system output parallel parameters performance pins pointer problem procedure processor program counter result RISC RISC machines segment shown in Fig signal slot SPARC specified stack switch symbol synchronous tion transfer truth table UNIX variables vector virtual address virtual memory Virtual page VME bus write