Guide to RISC Processors: for Programmers and Engineers

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Springer Science & Business Media, Dec 6, 2005 - Computers - 388 pages

Recently, there's been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design: Some example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel’s 64-bit processor Itanium.

This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM and Itanium. Initial chapters explain the differences between the CISC and RISC designs, and one clearly discusses the RISC design principles. Roughly the second half of the book is dedicated to MIPS assembly language programming, thereby enabling readers to grasp the concepts discussed in the first half.

Topics and features:

*Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience

*Presents material in a manner suitable for self-study, using several examples in each chapter

• Assembly language programs permit reader executables using the SPIM simulator

• Integrates core concepts to processor designs and their implementations

• Supplies extensive programming examples and figures

• Each chapter begins with an overview and ends with a summary

Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals and programmers seeking an authoritative and practical overview of RISC processors will find the guide an essential resource, and students in computer architecture and other courses will regard it as an important reference tool.

 

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Contents

Introduction
3
Processor Design Issues
13
RISC Principles
39
MIPS Architecture
47
SPARC Architecture
55
PowerPC Architecture
79
Itanium Architecture
97
ARM Architecture
121
Addressing Modes
211
Arithmetic Instructions
225
Conditional Execution
243
Logical and Shift Operations
269
Recursion
291
FloatingPoint Operations
305
A Number Systems
325
B Character Representation
339

SPIM Simulator and Debugger
149
Assembly Language Overview
159
Procedures and the Stack
183
Programming Exercises
365
Copyright

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About the author (2005)

Sivarama P. Dandamudi is a professor of computer science at Carleton University in Ottawa, Ontario, Canada, as well as associate editor responsible for computer architecture at the International Journal of Computers and Their Applications. He has more than two decades of experience teaching about computer systems and organization.

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