Design and Electron Beam Fabrication of Half Micrometer Low Noise GaAs Mesfet's |
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acetone active layer airbridges alignment marks alloy associated gain blow dry bonding pads contact layer contact lithography contact resistance contribution to source device layout doping level drain conductance drain current electron beam lithography electroplated epitaxy equivalent noise temperature evaporation exposed fabrication GaAs MESFET's gate length gate level gate line gate metal gate resistance gate structure gate width ground plane growth H20 rinse IDSS KEY 1 LOC level chip level wafer liftoff LOR 4 E1 MARK JOY MARK JOY KEY mesa level MESFET metal resistance metal sheet resistance MOV FC JOY MWFET N₂ blow dry noise figure noise temperature ohmic contact ohmic level overcut edges parameter performance photoresist PMMA PROCESS TITLE recess depth recessed gate RECT reduced resist layer RMP WAF S-parameters saturation Schottky source resistance spacer resist substrate test pattern transconductance undercut WAFER ALIGNMENT