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6A2 Reduced Reachability Graphs with Parallel Actions and Dynamic Replacement
6A3 Properties of Communication Modes in Distributed Systems Roberto Baldoni
Integrating Memory Consistency Models and Communication Systems Friedrich SchOn
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analysis application architecture Australia bandwidth block branch channel child outlets circuit clock communication configuration context switching cycle delay denoted distributed computation evaluation event execution fat-tree fault tolerant FIFO Figure function global graph heuristic hierarchical hypercube IEEE implementation initial input interconnection network iteration ith level join join algorithm kernel latency level cluster load load balancing loop machine median filtering memory access memory modules method micro-tasks monitoring multiplexing multiprocessor nodes number of processors obtained operations optimal optimisation output overhead packet parallel computers parallel program path performance phase pixel problem Proc queue remote memory rithm routing scheduling algorithm scheme Section semi-join server shared buffer shared memory shows signature simulation skew speedup step structure synchronous task scheduling technique threads throughput tion traffic Transactions transformation transputer tuple variables vector virtual channels visualization VPEcons