Computer Architecture and Organization, Volume 2 |
Contents
The Evolution of Computers | 1 |
Design Methodology | 85 |
Processor Design | 176 |
Copyright | |
6 other sections not shown
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Common terms and phrases
adder addition address register algorithm arithmetic array assembly language assembly-language binary numbers bits block buffer buses bytes cache called cell clock complex components connected contains control fields control lines control signals control unit coprocessor corresponding cycle data transfer decimal decoder defined denotes device digit example execution exponent fetch FIGURE fixed-point flip-flop floating-point floating-point number format function gate hardware hypercube IAS computer implemented input instruction set integer interconnection interrupt interrupt request language M₁ machine main memory mantissa memory address microinstruction microoperations microprocessor microprogram Multibus multiplexer multiplication multiprocessor n-bit node opcode operands operating system output parallel performance pipeline processor program counter queue represented request result RISC S₁ segment sequence sequential shift shown in Fig specified stack storage stored structure subroutine subtraction switching system bus tion twos-complement typical vector vector processors word zero