## Sequential Logic: Analysis and SynthesisUntil now, there was no single resource for actual digital system design. Using both basic and advanced concepts, Sequential Logic: Analysis and Synthesis offers a thorough exposition of the analysis and synthesis of both synchronous and asynchronous sequential machines. With 25 years of experience in designing computing equipment, the author stresses the practical design of state machines. He clearly delineates each step of the structured and rigorous design principles that can be applied to practical applications. The book begins by reviewing the analysis of combinatorial logic and Boolean algebra, and goes on to define sequential machines and discuss traditional and alternative methods for synthesizing synchronous sequential machines. The final chapters deal with asynchronous sequential machines and pulse-mode asynchronous sequential machines. Because this volume is technology-independent, these techniques can be used in a variety of fields, such as electrical and computer engineering as well as nanotechnology. By presenting each method in detail, expounding on several corresponding examples, and providing over 500 useful figures, Sequential Logic is an excellent tutorial on analysis and synthesis procedures. |

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#### Sequential Logic Analysis and Synthesis

User Review - R. Kramer - Overstock.comGood book! Easy to understand with lots of practical examples. I would definately recommend this book for anyone interested in sequential logic and finitestate machine design. Read full review

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adjacent asynchronous sequential machine binary boolean circuit clock signal column x1x2 combinational logic counter data inputs deasserted decoder diagram of Figure equivalent excitation variables feedback variables flip-flop y1 gate delays Gray code implemented input equations input maps input sequence input variables input vector input x1 JK flip-flops Karnaugh map latch y1 logic diagram logic gates machine of Example machine of Figure Mealy machine merged flow table merger diagram minimal minterm location Moore machine multiplexer next-state logic next-state table obtained operation output logic output map output z1 primitive flow table pulse-mode race condition reduced primitive flow represents reset select inputs shown in Equation shown in Figure specified stable static hazards static-1 storage elements sum-of-products table of Figure transient transition diagram transition sequence unspecified entries unused variables Y1e voltage level x1 and x2 x2 changes x2 pulse y1 and y2 Yj(t z1 is asserted