Low-Power CMOS Design for Wireless TransceiversLow-Power CMOS Design for Wireless Transceivers provides a comprehensive treatment of the challenges in low-power RF CMOS design. The author addresses trade-offs and techniques that improve the performance from the component level to the architectural level. Low-Power CMOS Design for Wireless Transceivers deals with the design and implementation of low- power wireless transceivers in a standard digital CMOS process. This includes architecture, circuits and monolithic passive components. The book is written for engineers and graduate students interested in learning about wireless networks, transceiver architectures, stacked inductors, design of RF front ends, and the design of a 2.4-GHz transceiver. |
Contents
INTRODUCTION | xix |
3 Overview of Topics | 1 |
TRANSCEIVER ARCHITECTURE | 3 |
22 Homodyne Receivers | 5 |
23 ImageReject Receivers | 7 |
31 DirectConversion Transmitters | 8 |
4 Proposed Transceiver Architecture | 9 |
5 Compatibility with GPS | 12 |
TRANSMITTER | 55 |
4 Power Amplifier | 59 |
Chapter 6 CHANNELSELECT FILTER | 65 |
22 Noise Performance | 68 |
23 Filter Tuning | 70 |
3 Filter Design | 72 |
33 Intermodulation Specification | 74 |
4 Filter Realization | 76 |
STACKED INDUCTORS AND TRANSFORMERS | 15 |
3 Large inductors with high selfresonance frequencies | 17 |
4 Derivation of SelfResonance Frequency | 19 |
5 Modification of Stacked Inductors | 24 |
6 Stacked Transformers | 26 |
7 Experimental Results | 30 |
RECEIVER FRONT END | 39 |
3 RF Mixers | 43 |
4 First Downconversion | 44 |
5 Second Downconversion | 50 |
52 Passive Mixers | 51 |
42 Input Transconductor and Parallel Resistor | 77 |
43 Capacitors | 78 |
44 ChannelSelect Filter | 80 |
EXPERIMENTAL RESULTS | 85 |
22 Test Board | 86 |
RF FrontEnd Chip | 88 |
TransmitterReceiver Chip | 91 |
CONCLUSION | 95 |
References | 99 |
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Common terms and phrases
1-to-4 transformer active mixer antenna baseband baseband signals bias current biquad sections Bluetooth bypass capacitor C/A code C₁ capacitor cascode CFCL channel channel-select filter Chapter chip CMOS technology component demodulator desired signal differential direct-conversion electric energy elliptic filters filter topology flicker noise Frequency GHz GFSK GPS receiver GPS signals heterodyne homodyne homodyne receiver image rejection image signal impedance inductance input transconductor interferers linearity M₁ M₂ modulation modulation index noise figure noise performance noninvasive filter output noise parallel resistor passive mixers power consumption power dissipation quadrature quality factor receiver front end resistor RF front end RF signal Second upconversion self-resonance frequency shown in Fig shows signal band Simulation results single-ended spectrum stacked inductors stacked transformer stacking techniques standard digital CMOS structure topology transceiver transceiver architecture transconductor stage transistors transmitter two-layer voltage gain Vout wireless LANs wireless transceivers