Studies of InAIAs/InGaAs and GaInP/GaAs heterostructure FET's for high speed applications |
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Contents
Gao 5iIno 49PGaAs HETEROSTRUCTURE DEVICES | 11 |
LOWFREQUENCY NOISE AND FREQUENCY DISPERSION | 50 |
PCHANNEL InAlAsInxGaixAs x 033 0 65 STRAINED | 65 |
3 other sections not shown
Common terms and phrases
1/f noise 2DEG AlGaAs AlGaAs/GaAs HEMTs annealing bandgap bias conditions carriers conduction band D-mode deep traps demonstrated device characteristics device performance doped Drain-source voltage dual-channel E/D-mode HIGFET enhancement etching evaluated fabricated FET's fflGFETs Figure frequency GaAs GalnP/GaAs HEMTs gate bias Gate dimensions gate leakage gate voltage gate-length Gate-source voltage HEMT's heterostructures HIGFET inverters high speed higher I-V characteristics IEEE impact ionization implant InAlAs buffer InAlAs/InGaAs HIGFETs increase InGaAs channel integrated circuits ion implantation Isub kink effect lattice matched lift-off material system measurements mesa MESFETs mobility mS/mm noise margin observed ohmic contacts operation output conductance p-buffer p-doped p-type pinch-off region results of Fig Schottky barrier Schottky barrier height semiconductor shown in Fig shows sidegating single-channel spectra strained channel substrate injection subthreshold current Temperature dependent tensile stress threshold voltage transconductance transfer characteristics trap level undoped InAlAs valence band values WSix film WSix gates
Bibliographic information
| Title | Studies of InAIAs/InGaAs and GaInP/GaAs heterostructure FET's for high speed applications |
| Author | Yi-Jen Chan |
| Publisher | University of Michigan., 1992 |
| Original from | the University of Michigan |
| Digitized | Mar 26, 2011 |
| Export Citation | BiBTeX EndNote RefMan |