Computer Arithmetic: Algorithms and Hardware Designs
Ideal for graduate and senior undergraduate courses in computer arithmetic and advanced digital design, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, provides a balanced, comprehensive treatment of computer arithmetic. It covers topics in arithmetic unit design and circuit implementation that complement the architectural and algorithmic speedup techniques used in high-performance computer architecture and parallel processing. Using a unified and consistent framework, the text begins with number representation and proceeds through basic arithmetic operations, floating-point arithmetic, and function evaluation methods. Later chapters cover broad design and implementation topics-including techniques for high-throughput, low-power, fault-tolerant, and reconfigurable arithmetic. An appendix provides a historical view of the field and speculates on its future.
An indispensable resource for instruction, professional development, and research, Computer Arithmetic: Algorithms and Hardware Designs, Second Edition, combines broad coverage of the underlying theories of computer arithmetic with numerous examples of practical designs, worked-out examples, and a large collection of meaningful problems. This second edition includes a new chapter on reconfigurable arithmetic, in order to address the fact that arithmetic functions are increasingly being implemented on field-programmable gate arrays (FPGAs) and FPGA-like configurable devices. Updated and thoroughly revised, the book offers new and expanded coverage of saturating adders and multipliers, truncated multipliers, fused multiply-add units, overlapped quotient digit selection, bipartite and multipartite tables, reversible logic, dot notation, modular arithmetic, Montgomery modular reduction, division by constants, IEEE floating-point standard formats, and interval arithmetic.
* Divided into 28 lecture-size chapters
* Emphasizes both the underlying theories of computer arithmetic and actual hardware designs
* Carefully links computer arithmetic to other subfields of computer engineering
* Includes 717 end-of-chapter problems ranging in complexity from simple exercises to mini-projects
* Incorporates many examples of practical designs
* Uses consistent standardized notation throughout
* Instructor's manual includes solutions to text problems
* An author-maintained website http://www.ece.ucsb.edu/~parhami/text_comp_arit.htm contains instructor resources, including complete lecture slides
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Representing Signed Numbers
Redundant Number Systems
27 other sections not shown
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2's-complement numbers algorithm approximation arithmetic operations array multiplier binary numbers bit-serial bits block Booth's recoding carry propagation carry-lookahead adder carry-save carry-save adder carry-select carry-skip adder Chapter circuit codes complement Computer Arithmetic constant convergence CORDIC Dadda tree decimal delay depicted in Fig digit set discussed divider division divisor encoding error example exponent fc-bit Figure floating-point numbers format FPGA fractional full adder function gate hardware high-radix IEEE Trans implementation inputs integer interval interval arithmetic iterations latency leading log2 logarithmic logic lookahead method modular moduli needed nonrestoring number representation number system operands output partial remainder performed pipeline position precision prefix sums processor quotient digit selection radix radix point radix-4 reduce redundant represented residue residue number system result ripple-carry adder rounding scheme Section shift Show shown in Fig signal signed-digit representations significand speed square-rooting subtraction table lookup unsigned values vector VLSI Wallace tree width